Autores: Gatta, F.; Gomez, R.; Young Shin; Hayashi, T.; Hanli Zou; Chang, J.Y.C.; Dauphinee, L.; Jianhong Xiao; Chang, D.S.-H.; Tai-Hong Chih; Brandolini, M.; Dongsoo Koh; Hung, B.J.-J.; Tao Wu; Introini, M.; Cusmai, G.; Zencir, E.; Singor, F.; Eberhart, H.; Tan, L.; Currivan, B.; Lin He; Cangiane, P.; Vorenkamp, P.
Resumen
An embedded CMOS digital dual tuner for DOCSIS 3.0 and set-top box applications is presented. The dual tuner down-converts a total of ten 6 MHz Annex B channels or eight 8 MHz Annex A channels, for a maximum data rate of 320 Mb/s in Annex B and 400 Mb/s in Annex A mode. The dual tuner exceeds all the stringent SCTE 40 specifications over the 48-1004 MHz bandwidth, without using any external components or SAW filters. Enabling technologies are a harmonic rejection front-end, a low-noise high-frequency resolution PLL, and digital image rejection. To our knowledge this is the first reported multichannel broadband tuner embedded in a DOCSIS 3.0 System on a chip implemented in 65 nm pure digital CMOS technology.
